Conference

FAST’14

Authors

Jaeyong Jeong, Sangwook Shane Hahn, Sungjin Lee, Jihong Kim

Summary

Problem

Even though the NAND density doubles every two years, the storage lifetime does not increase as much as expected in a recent device technology. Many existing lifetime-enhancing techniques have mainly focused on reducing WAF by increasing the efficiency of an FTL algorithm. Data de-duplication, data compression and write traffic throttling are such examples.

Background

  • Threshold Voltage Distributions of NAND Flash Memory

    The threshold voltage gap between two adjacent states and the width of a threshold voltage distribution are mainly affected by data retention and program time requirements, respectively. They should be carefully designed to meet all the NAND requirements. All the reliablility parameters usually fixed during device design time, but it is possible to improve the reliability or performance behavior of the storage porduct by exploiting tradeoff relationships among various reliability parameters.

  • NAND Program Operations

    The incremental step pulse programming (ISPP) scheme

Dynamic Program and Erase Scaling (DPES)

DPES is based on their key observation:

Slowly erasing a NAND block with a lower erase voltage significatly improves the NAND endurance.

  • Erase Voltage Scaling and its Effect on NAND Endurance

    The higher stress voltage accelerates the probability of stress-induced damage which degrades the oxide reliablility.

    In this paper, they use a NAND endurance model with five different erase voltage modes, EVmode0, …, EVmode4. EVmode0 uses the highest erase voltage V0 while EVmode4 uses the lowest erase voltage V4.

  • Dynamic Program Scaling

    In order to write data to a shallowly erased NAND block, it is necessary to change program bias conditions dynamically so that narrow threshold voltage distributions can be formed after program operations. If a NAND block was erased with a lower erase voltage, a threshold voltage window for a program operation is reduced by the decrease in the erase voltage.

    In this paper, they define five different write modes, Wmode0, …, Wmode4 where Wmodei satisfies the minimum program time requirement of the blocks erased by EVmodei.

  • Erase Time Scaling and its effect on NAND Endurance

    It is effective to start the erase voltage with a low voltage and gradually increase to the nominal erase voltage for minimizing unnecessary damage. The erase time increases when an erase operation starts with lower voltage.

    Two erase speed mode, Esmode fast and Esmode slow are represented.

  • Lazy Erase Scheme

    When a NAND block was erased with EVmodei, a page in the shallowly erased block can be programmed using specific Wmodej’s (j ≥ i). Lazy erase scheme is proposed for additinally erasing the shallowly erased NAND block when necessary, with a small extra erase time.

Design and Implementation of AutoFTL

  • Write Mode Selection

    Wmode selector estimate the maximum available program time for a given write request depending on the utilization of a circular buffer of write requests.

  • Extended Mapping Table

    Since erase operations are performed at the NAND block level, the per-block mode table maintains five linked lists of blocks which were erased using the same erase voltage mode.

  • Erase Voltage Mode Selection

    AutoFTL use the average buffer utilization of 10^5 past write requests for predicting the future utilization of the circular buffer to select erase voltage mode.

  • Erase Speed Mode Selection

    A erase speed mode is determined by estimating the effect of a block erase time on the buffer utilization.

  • DPES-Aware Garbage Collection

    When the garbage collector is invoked, the most appropriate write mode for copying valid data is determined by using the same write-mode selection rules with slight modification to computing the buffer utilization for considering increment in the buffer utilization by copying valid pages. After copying all the valid pages, Erase voltage mode and erase speed mode is selected by using the same rules as before.

  • DPES-Aware Wear Leveling

    DPES-aware wear leveler uses the total sum of the effective wearing instead of the numver of P/E cycles as a reliablility metric.